In the last 10 year, Sofics has supported more than 10 projects on Silicon Photonics IC projects for 56Gbps+ communication. One of the key challenges our customers faced was the fact that conventional ESD protection introduced too much parasitic capacitance between the interface pads and the supply lines.
Our engineers developed custom ESD protection clamps with parasitic capacitance that is ten times lower than the typical ESD protection devices. The technology is proven on advanced CMOS (40nm, 28nm), FinFET (N16, N12, N7 and N5), SOI and SiGe processes.

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