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14 August 2012
Cortina Systems has announced an electronic dispersion compensation (EDC) chip that supports eight duplex 10Gbps links. The CS4342 is suited for use with optical modules and on line cards to counter the effect of transmission distortion where a bit's energy leaks into one or more adjacent bits. 

The Cortina device can be used for 10, 40 and 100Gbps line card and backplane designs and supports copper cable and optical fibre standards. "Boards are getting denser: from 48 ports to 96," says Scott Feller, director of the EDC product line at Cortina Systems. Using the PHY chip extends the reach of the on-board silicon to connect to these interfaces.

Vendors also gain greater flexibility in terms of the interfaces they can support. "These types of PHYs allow them [designers] to avoid having to make hard decisions," says Feller. "They put the PHY in front of the optical connector and they almost get every single optical format on the market."  
Platforms using EDC PHYs include data centre switches and telecom platforms such as packet optical transport systems (P-OTS). Data centre switches typically support Direct Attach Copper cable and short-reach optical interfaces such as 10GBASE-LRM. For P-OTS, the interfaces include the 80km 10GBASE-ZR where EDC is a necessity. The device is also being used for system backplanes where bandwidth requirements are also increasing significantly.
The CS4342 is a 17x17 ball grid array, a third smaller than competing devices, says the company. The device has an on-chip DSP used to calculate the analogue filter's weights that compensate the dispersion. The EDC has a resulting latency of 1ns only. The CS4342 is available in sample form and will enter production from October. 
By Roy Rubenstein